http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H09512667-A

Outgoing Links

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classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-3185
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66765
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classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G02F1-1368
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filingDate 1995-05-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationDate 1997-12-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-H09512667-A
titleOfInvention Method of passivating side surface of thin film semiconductor component
abstract (57) [Summary] The present invention is a method of passivating a semiconductor component, in particular, a side surface of a thin film resistor in order to reduce conductivity in an off state. The method of the present invention uses the etched sides (41, 42; 15, 16; 27, 28) of the semiconductor layer (4, 12, 21) of the mesa (4,5, 9) or the mask used during etching. It is characterized in that it is passivated before removing (9). INDUSTRIAL APPLICABILITY The present invention is applicable to all methods of manufacturing thin film transistors used in flat liquid crystal screens.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2012049517-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9257561-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2012209550-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2012094851-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011216872-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9230826-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2014038911-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2012114399-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-8704230-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011216871-A
priorityDate 1994-04-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 29.