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filingDate 1995-02-14-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_16f82cb52aeb5312c93204f769266411
publicationDate 1996-06-11-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-H08153804-A
titleOfInvention Method of forming gate electrode
abstract (57) [Summary] [Object] To form a gate electrode having excellent adhesion to a SiO 2 film and capable of maintaining a good breakdown voltage of a gate oxide film even with a WSi x layer alone. [Structure] LP based on SiCl 2 H 2 reduction of WF 6 By CVD, a WSi x layer 5i having a Si composition ratio x of 2.7 or more, preferably 3.0 or more is formed. This WS Since the i x layer 5 i has a small amount of F atoms taken in, the bonds of Si atoms can be sufficiently bonded to the O atoms of the gate oxide film 4. In the formation regions of both the nMOS and pMOS transistors, the n-type and p-type impurities are ion-implanted into the WSi x layer 5i, respectively, and then patterned to form the gate electrodes 5na and 5pa whose work functions are controlled. The voltage V th can be made symmetrical. [Effect] A low-resistance, thin gate electrode is realized at low cost, which contributes to high integration of MOS transistors and high-speed operation.
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priorityDate 1994-09-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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Total number of triples: 42.