http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H0629250-A

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_460c2d3884b7724541bf93de2a201dfd
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-3065
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-302
filingDate 1992-07-09-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_adb630be68acc17a035daea2bd803daa
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7cd02ca52775896bce5f7567a3337bb5
publicationDate 1994-02-04-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-H0629250-A
titleOfInvention Method for manufacturing semiconductor device
abstract (57) [Abstract] [PROBLEMS] To provide a method for manufacturing a semiconductor device capable of making the etching rate ratio of a surface treatment film for gettering and a silicon nitride film sufficiently large. [Configuration] Lateral PNP transistor 1, lateral NPN transistor 2, and capacitor 3 on a silicon IC substrate To form. At this time, the PSG film 25 is formed on the silicon IC substrate. Then, the GaAs Hall element 4 is formed on a part of the silicon IC substrate, and then the plasma SiN film 24 is deposited as a protective film on the silicon IC substrate including the GaAs Hall element 4. Further, the plasma SiN film 24 at a portion other than the GaAs element 4 portion is selectively etched using the parallel plate type plasma etching apparatus of anode coupling while leaving the PSG film 25.
priorityDate 1992-07-09-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 20.