http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-H01276725-A

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classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3065
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filingDate 1989-03-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_40ea48f119c9d0534472bc496bea08f9
publicationDate 1989-11-07-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-H01276725-A
titleOfInvention Method of forming groove in silicon substrate for super-high-density integrated semiconductor circuit
abstract PURPOSE: To make a groove having a smooth wall surface and a round bottom surface in a silicon substrate with high reproductivity by a reactive ion etching method of using a mask in an etching atmosphere containing trifluorobromomethane. n CONSTITUTION: For an etching mask 2 in the case of making a groove 3 in a silicon substrate 1, an SiO 2 film which is made by the thermal decomposition of tetraethylorthosilicate is used. Reactive ion etching is performed by a three- pole type plane plate reactor. In the reactor, an etching mixed gas comprising trifuorobromomethane and nitrogen is used. In that case, the harmonics of two different frequencies are simultaneously applied for the generation and acceleration of reactive ions. Therefore, a groove having a slightly tilted smooth wall surface and a round bottom surface is made with good reproductivity. A large-capacitance groove capacitor is obtained therefrom. n COPYRIGHT: (C)1989,JPO
priorityDate 1988-03-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 23.