http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2022154154-A

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_800cb9ea13490b2be4ac36483ca026bf
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0950e9df7f0e1b73efee1bda859951ad
classificationCPCAdditional http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1608
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823487
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-45
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7813
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7827
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-401
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66477
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41741
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0684
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0705
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66734
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4236
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-45
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0603
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-456
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-12
filingDate 2021-03-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_fb2bcadfec20db333496c82a01434096
publicationDate 2022-10-13-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2022154154-A
titleOfInvention semiconductor equipment
abstract A semiconductor device capable of suppressing warping and breaking of a semiconductor element is provided. According to one embodiment, a semiconductor device includes a first transistor, a second transistor, a third electrode, and a control layer. The first transistor has a first region of a semiconductor layer having a first side and a second side, a first electrode, and a first gate electrode. The first electrode is electrically connected to the second surface of the first region. A first gate electrode is provided in the first region. The second transistor has a second region of the semiconductor layer provided adjacent to the first region, a second gate electrode, and a second electrode. A second gate electrode is provided in the second region. The second electrode is electrically connected to the second surface of the second region. A third electrode is provided on the first surface side and electrically connected to the first transistor and the second transistor. The control layer is provided such that the third electrode is positioned between the control layer and the first surface, and has a coefficient of linear expansion smaller than that of the third electrode. [Selection drawing] Fig. 1
priorityDate 2021-03-30-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

Predicate Subject
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID23978
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID23976
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID425762086
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419405613
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID458391465
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID23932
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID23964
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID418354341

Total number of triples: 39.