| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_fdf3b6ced3d7710ec0bc0addb67a1cc9 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7869
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1251
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1207
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1214
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66969
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1225
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78618
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-41733
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78693 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-792
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-788
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-1156 |
| filingDate |
2020-06-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_949501fab1aab8582f126f6a2d4786ac |
| publicationDate |
2020-09-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
JP-2020141150-A |
| titleOfInvention |
Semiconductor device |
| abstract |
PROBLEM TO BE SOLVED: To provide a semiconductor device capable of high-speed operation. It also provides a highly reliable semiconductor device. SOLUTION: An oxide semiconductor having crystallinity is used for a semiconductor layer of a transistor, and a channel formation region, a source region and a drain region are formed in the semiconductor layer. The source region and drain region are formed by applying one or more elements of rare gas or hydrogen to the semiconductor layer using the channel protection layer as a mask by an ion doping method or an ion implantation method. [Selection diagram] FIG. 7 |
| priorityDate |
2010-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |