| abstract |
A method of manufacturing a semiconductor device and a semiconductor device that suppress the abnormal growth of the epitaxial layer when a raised epitaxial layer is formed. In step F2, an isolation region and an element formation region are formed on an SOI substrate. In step F3, an SOI region and a bulk region are formed. At this time, the isolation insulating film of the isolation region is exposed on the entire sidewall of the step between the SOI region and the bulk region. In step F4, a gate electrode is formed. In step F5, extension implantation of the bulk transistor is performed. At this time, a process for preventing the impurity of extension implantation from being implanted into the SOI region is performed. In step F6, a raised epitaxial layer is formed in the SOI region. [Selection] Figure 1 |