http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2013229013-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b822ee046eb6c45d1e3bd9ce9c1782e |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/Y02D10-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F2212-222 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-0893 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-0802 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F12-0866 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F3-06 |
| filingDate | 2013-03-13-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_71aa3b9d616efa9d4f3d1ae5d1e97710 |
| publicationDate | 2013-11-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | JP-2013229013-A |
| titleOfInvention | Array controller and storage system |
| abstract | A storage system including a cache memory that does not require replacement of a power storage device, a cache memory that consumes less power, and a cache memory that does not limit the number of rewrites. An array controller for storing data input from the outside in any of a plurality of storage devices, or a storage system having the array controller, wherein the data is stored in any of the plurality of storage devices. A processor that specifies whether to store data, and a cache memory that stores data and outputs the data to any of the plurality of storage devices, the cache memory using a transistor having an oxide semiconductor layer It has a circuit. [Selection] Figure 1 |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2016164778-A |
| priorityDate | 2012-03-29-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 59.