http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2012033530-A

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filingDate 2010-07-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2012-02-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber JP-2012033530-A
titleOfInvention Semiconductor device and manufacturing method thereof
abstract The present invention relates to a semiconductor device having a gate electrode having a stack structure in which a floating gate and a control gate are stacked, and a semiconductor device capable of preventing a short circuit failure between adjacent memory cells or between a memory cell and a bit line, and a method for manufacturing the same. I will provide a. A conductive film having a first width, an ONO film, and a control gate are formed on a tunnel gate insulating film. After forming the floating gate 26 by etching the conductive film 24 using the control gate 40 as a mask, an interlayer insulating film 80 is formed, and a contact hole 84 whose width in the first direction is wider than the first width is formed. Thereafter, sidewall spacers 88 are formed on the inner walls of the contact holes 84. [Selection] Figure 1
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