| abstract |
A semiconductor device capable of reading stored information from a nonvolatile memory cell at high speed is provided. The microcomputer includes an internal bus 68, a central processing unit 61 coupled to the internal bus, and a nonvolatile memory 63 coupled to the internal bus. The nonvolatile memory includes a plurality of nonvolatile memory cells including a first gate and a second gate, a first circuit 21 coupled to the first gate of one of the plurality of nonvolatile memory cells, and the plurality of nonvolatile memories. Voltage generation circuits VS and 77 for generating a second circuit 22 coupled to one of the second gates of the memory cell, a first voltage supplied to the first circuit, and a second voltage supplied to the second circuit. And including. The gate breakdown voltage of the first circuit is lower than the gate breakdown voltage of the second circuit. [Selection] Figure 25 |