| abstract |
An integrated circuit die having a low resistance of an internal bus and other conductive paths and a method of manufacturing the same. In accordance with the present invention, a relatively thick metal strap layer is formed over a top bus or other conductive path. The metal strap layer is formed by etching a passivation layer covering an upper part of a bus or the like to form a vertical groove, and plating a thick metal layer in the groove. It is preferable to plate nickel. The metal strap layer can greatly reduce the resistance of the bus. [Selection] Figure 15 |