Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_be055db3c1a09879df07379ba969e223 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7833 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823412 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823462 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 |
filingDate |
2006-03-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d690e0f9708e9664431250e053f9c3e0 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5756a5de9e3588b57a00ba30c3817692 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f0f519d934fc4a4b9fbdaf52dc39aaac |
publicationDate |
2007-10-18-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
JP-2007273769-A |
titleOfInvention |
Manufacturing method of semiconductor device |
abstract |
An object of the present invention is to prevent a transistor characteristic abnormality in a manufacturing method of a MOS type semiconductor device having three types of gate insulating films having different film thicknesses. A low-leakage MOSFET active region is covered with a protective insulating film 105 when a silicon oxide film 108 to be a first gate insulating film is formed. Thereafter, the protective insulating film 105 on the low-leakage MOSFET active region is removed, and a second gate insulating film is formed on the low-leakage MOSFET active region. [Selection] Figure 11 |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011009313-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2010150332-A1 |
priorityDate |
2006-03-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |