http://rdf.ncbi.nlm.nih.gov/pubchem/patent/FR-2719416-A1

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filingDate 1994-04-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_65ed05c2165f56d1574ab7020d7110e4
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publicationDate 1995-11-03-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber FR-2719416-A1
titleOfInvention Process for passivation of the sides of a thin-film semiconductor component.
abstract The present invention relates to a method for passivation of the flanks of a semiconductor component and in particular of a thin film transistor (TFT) making it possible to reduce conduction in the blocking state. This method is characterized by the fact that it comprises a step of passivation of the etched faces (41, 42; 15, 16; 27, 28) of the semiconductor level (4, 12, 21) of the mesa (4, 5, 9 ), before removing a mask (9) used during the engraving. This process is particularly well suited to TFT manufacturing processes used in liquid crystal flat screens.
priorityDate 1994-04-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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