| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_bc7cdc960cbdff22147fdbcaf681a271
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_61c08a020384ecbed53da34f8513bc36 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823892
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0886
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02164
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823431
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0649
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02271
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-53271
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02219
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823821
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-324
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823462
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0924
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0684
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02326
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02337
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66795
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823878 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-311
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8238 |
| filingDate |
2017-08-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8bf07e0858c58a6ff0b1d26cc24f3a2e |
| publicationDate |
2018-03-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
EP-3291291-A2 |
| titleOfInvention |
Semiconductor device and fabrication method thereof |
| abstract |
Semiconductor devices and fabrication methods thereof are provided. An exemplary fabrication method includes providing a semiconductor substrate; forming a plurality of fins on a surface of the semiconductor substrate; forming an isolation flowable layer covering the plurality of fins over the semiconductor substrate; performing a first annealing process to turn the isolation flowable layer into an isolation film; and forming first well regions and second well regions in the fins and the semiconductor substrate. The second well regions are at two sides of the first well regions and contact with the first well regions; the first well regions have a first type of well ions; the second well regions have a second type of well ions; and the first type is opposite to the second type in the conductivities. |
| priorityDate |
2016-09-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |