http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0842530-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_44770642a1f12da1d0b11f90ba408d92 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-46 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66522 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-465 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66969 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-383 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-34 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-46 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-465 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-383 |
| filingDate | 1995-07-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_39e60b8a64b91aaf3317c083a5ba657c |
| publicationDate | 1998-05-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | EP-0842530-A1 |
| titleOfInvention | Method of forming self-aligned thin film transistor |
| abstract | During the formation of a self-aligned thin film transistor (50), the semiconductor material channel layer (58) on the gate insulating layer (56) has a passivation shield (PS) applied to it aligned with the gate electrode (54). The channel layer is then exposed to a reagent selected to yield a chemical reaction with the portions of the channel layer (58) not covered by the passivation shield (PS) causing removal of a component of the semiconductor material thereby to change the electical properties of those portions of the channel layer. In this manner, doped source and drain regions (60, 62) can be formed on opposite sides of the channel having edges that extend to the edges of the gate electrode avoiding any overlap therebetween and reducing the parasitic capacitance of the thin film transistor (50). |
| priorityDate | 1995-07-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 26.