http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0720215-A1

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filingDate 1995-12-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_cf086d5c08bff558452ea1dace4bb964
publicationDate 1996-07-03-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber EP-0720215-A1
titleOfInvention Fabrication process for MOSFET
abstract A P-type diffusion layer (112) for buried channel is formed on the surface of N-well (102) immediately below a gate electrode (111a), then a side wall spacer (115a) is formed at the side surface of the gate electrode. Subsequently, with taking the gate electrode and the side wall spacer as mask, phosphorous ion (127) is implanted to the N-well by oblique rotating ion implantation and boron fluoride ion (120) is implanted by perpendicular ion implantation. Then, phosphorous ion and boron fluoride ion are activated by heat treatment to form high density P-type diffusion layer (122) and P-type diffusion layer (117) for buried channel.
priorityDate 1994-12-28-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 28.