http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-0497925-A4
Outgoing Links
Predicate | Object |
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classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2203-0152 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2203-0726 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2203-0793 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K2203-0376 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/C23F1-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-108 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H05K3-025 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C25D7-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-06 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-02 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-10 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H05K3-24 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/C23F1-02 |
filingDate | 1991-03-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 1993-03-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | EP-0497925-A4 |
titleOfInvention | Method for printed circuit board pattern making using selectively etchable metal layers |
abstract | The present invention provides a method for producing high density electronic circuit boards (10) comprising the steps of depositing a layer of a first metal (26) upon a layer of foil (20) to produce a composite (29) then attaching the composite (29) to an insulative support (12) to produce a laminate (31). The layer of foil (20) is then removed from the layer of first metal (26). Photoresist is then applied to the layer of first metal (26), exposed and developed. During the development of the photoresist portions of the photoresist (44) are removed from the layer of first metal (26). A layer of third metal (54) is then plated upon the portions of the layer of first metal (26) that are not covered by the photoresist (44). All remaining photoresist (44) and the portions of the layer of the first metal (26) which are not covered by the third metal (54) are then removed producing a finished fine-line pattern (60) having conductive (14) and insulative areas (61). The finished fine-line pattern (60) may then be utilized to produce a circuit board. |
priorityDate | 1990-08-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 57.