http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-102012217793-A1
Outgoing Links
Predicate | Object |
---|---|
assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_a2bcaf91101a370a3d64e3190366357f |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C1-00317 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3065 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G02B26-0833 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-48 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-306 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B81C1-00 |
filingDate | 2012-09-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_999fac2e26b1f5b3cdf7499c31c5d451 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_72cfbe3bd9aeba64384b18e782da6a03 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8e1118273677cf41f7eddf093856c6c0 |
publicationDate | 2014-04-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | DE-102012217793-A1 |
titleOfInvention | PRODUCTION METHOD |
abstract | Embodiments of the present invention provide manufacturing methods. In a first step, a semiconductor substrate is provided with a lattice plane that is non-symmetric and at an angle α offset to at least a first main surface area or a second main surface area of the semiconductor substrate, wherein the first main surface area and the second main surface area are parallel to each other. In a second step, anisotropic etching is carried out starting from the first main surface area into the semiconductor substrate in order to obtain an etching structure that has two different etching angles with respect to the first main surface area in a plane that is perpendicular to the first main surface area of the semiconductor substrate. In a third step, a cover layer is arranged on the first main surface area of the semiconductor substrate so that the cover layer bears against the etching structure at least in regions. In a fourth step, the material of the semiconductor substrate is removed in sections, starting from the second main surface area in the region of the deformed cover layer, so that the cover layer is exposed in at least one window area. |
isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-109153562-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11479461-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2020011422-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-102019218819-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-102021103353-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-102014202842-B4 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-109153562-B |
priorityDate | 2012-09-28-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 37.