http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114994484-A

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filingDate 2022-04-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_10d27e42fe700a55e30fd5b10291cf48
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publicationDate 2022-09-02-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-114994484-A
titleOfInvention A test chip for simulation verification
abstract The invention relates to the technical field of integrated circuits, in particular to a test chip for simulation verification. It includes three test capabilities of electricity, heat and force. Electric test includes square wave generator, tri-state buffer, electromigration test, etc.; thermal test includes heating resistance, temperature measuring diode, etc.; force test includes both sides of horizontal plane XY Toward stress test. The test chip used for simulation verification designs the above-mentioned devices and functions on a silicon wafer through a semiconductor process, each silicon wafer unit includes all the above-mentioned functions, and different units can be cascaded on the silicon wafer to form a customizable size of the test chip. Compared with the conventional test chip, the present invention has more complete integrated test functions, and the size can be directly cut as required, and has higher versatility and reliability.
priorityDate 2022-04-21-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 24.