http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114695224-A

Outgoing Links

Predicate Object
classificationCPCAdditional http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2223-54426
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-80896
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2225-06548
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-481
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2225-06541
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-08146
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-8013
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-0217
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2225-06593
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-50
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-544
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76898
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-03
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-80
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-08
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-0657
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-68
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-68
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L23-00
filingDate 2020-12-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c7019d63cff507ff097bd6c05e6bd31a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b1a2e41e23df88523bb68a90df960290
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d75ba6147374007529acbaa5c6ab2cae
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_86dfbd6bce9bc277657466fc112700f7
publicationDate 2022-07-01-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-114695224-A
titleOfInvention Die bonding alignment structure, bonded chip structure and manufacturing method thereof
abstract The invention discloses a chip bonding alignment structure, a bonding chip structure and a manufacturing method thereof, wherein the chip bonding alignment structure comprises: a semiconductor chip, a metal layer, an etching stop layer, at least one metal bump, and a dielectric barrier layer, silicon oxide layer, and silicon carbonitride layer. The metal layer is on the bonding surface of the semiconductor chip and has a metal alignment pattern. An etch stop layer overlies the bonding surface and the metal layer. The metal bump extends upward from the metal layer through the etch stop layer, and the dielectric barrier layer covers the etch stop layer and the metal bump. A silicon oxide layer covers the dielectric barrier layer. The silicon carbonitride layer covers the silicon oxide layer.
priorityDate 2020-12-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

Predicate Subject
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID24261
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID23978
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419559541
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419549006
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID418354341
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID5461123
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID457707758
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID9863
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID3084099
http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID419522015

Total number of triples: 41.