http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-114429955-A
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c3b503ee3d961fd28b5e67cc8a2bdecd |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823437 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823475 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823487 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 |
| filingDate | 2022-01-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d0745505ae0996365b044db8ce36ad15 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_7c478f0e78128bdf624400819908ba37 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4e0aacd702513c050ce235c2affdf75b |
| publicationDate | 2022-05-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | CN-114429955-A |
| titleOfInvention | Shielded gate trench power device and method of making the same |
| abstract | The present invention provides a shielded gate trench function device and a preparation method thereof, comprising: a substrate, the substrate has a device region and an electrode connection region, the device region has a first trench, and the electrode connection region There are several second trenches; the source polysilicon layer is located in the second trench and fills the second trench; the shield gate fills a part of the depth of the first trench; the first dielectric layer is filled with at least one of the first trenches adjacent to the second trench and filling the remaining part of the depth of the first trench; a gate polysilicon layer located at the remaining part of the first trench that fills the first trench depth; a first metal wiring layer is located on the first dielectric layer and is electrically connected to the gate polysilicon layer and the source polysilicon layer. Insulating the first trench where the lateral etching occurs from the remaining gate polysilicon layer and the source polysilicon layer fundamentally avoids the short circuit phenomenon of the device that may be caused by the lateral etching. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-115692319-A http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-115692319-B |
| priorityDate | 2022-01-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
| Predicate | Subject |
|---|---|
| isDiscussedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID426098968 http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID6327157 |
Total number of triples: 21.