| abstract |
The present invention is a test system for testing silicon wafers or packaging devices. The system includes a tester having a plurality of test stacks, each supporting a vertical stack of test engines, data buffers, pin drivers, and other resources, electrically connected to a wafer or device under test on one side and to a test host on the other side by fast data links. Each test stack is disposed on a top side of a wafer contactor electrically connected to a wafer or a load board electrically connected to a device under test. The system includes a cooling system for dissipating heat during operation. The system minimizes data signal paths between pads of a device under test and pin drivers of a tester, a test engine, and a test host. By connecting the bottom of each test stack directly to the wafer contactor, high performance can be achieved. |