| Predicate |
Object |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-97
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2924-15151
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-04105
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48091
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-73267
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-48227
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-568
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-73265
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2225-06582
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-12105
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-49827
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2225-0651
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-85005
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L2224-32145 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-50
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B7-007
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-97
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81C1-00261
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B81B7-0006
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L23-5389
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L25-0657
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-19
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L24-20 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B81C1-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B81B7-00 |
| filingDate |
2015-11-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| grantDate |
2022-03-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationDate |
2022-03-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
CN-106672888-B |
| titleOfInvention |
Method and device for packaging an integrated circuit die |
| abstract |
The present invention relates to methods and devices for packaging integrated circuit dies. A package substrate with openings and through-substrate interconnect structures is attached to a temporary carrier such as an adhesive film. The active surface of the IC die is placed in contact with the carrier substrate within the opening to temporarily attach the die to the carrier substrate. Another die is attached to the side of the first die furthest from the carrier substrate. According to an embodiment, the two dies are attached to each other using epoxy such that their respective non-active surfaces face each other. Bond wires are connected between the interconnects at the active surface of the second die and the package substrate. The leads are then packaged. After removal of the carrier substrate, a build-up interconnect structure is formed that includes external interconnects of the package substrate (eg, solder balls of a ball grid array package). |
| priorityDate |
2015-11-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |