http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-105895531-B
Outgoing Links
Predicate | Object |
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classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B82Y40-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-8238 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-517 |
classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02532 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02381 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02639 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0262 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7834 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-2053 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66628 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-3065 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-205 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-7848 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-18 |
classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02 |
filingDate | 2006-01-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
grantDate | 2020-03-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationDate | 2020-03-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber | CN-105895531-B |
titleOfInvention | CMOS transistor junction regions formed by CVD etch and deposition sequence |
abstract | The present application relates to a "CMOS transistor junction region formed by a CVD etch and deposition sequence". The invention is complementary to the process of replacing a source-drain CMOS transistor. The processing sequence may include etching a recess in the substrate material using one set of equipment and then performing the deposition in another set of equipment. A method for etching and subsequent deposition in the same reactor without exposure to air is disclosed. Etching the source-drain recess "in situ" for switching source-drain applications has several advantages over "ex situ" etching techniques. The transistor drive current is increased by: (1) the contamination of the silicon-epitaxial layer interface is eliminated when the surface is exposed to air during etching, and (2) the shape of the etched recess is precisely controlled. Deposition can be accomplished by a variety of processes including selective and non-selective methods. In the case of equal thickness deposition, a method of avoiding amorphous deposition in the critical region of performance has also been proposed. |
priorityDate | 2005-01-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 50.