http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-101567314-B

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filingDate 2009-04-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
grantDate 2013-10-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2013-10-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber CN-101567314-B
titleOfInvention Technique for controlling trench profile in semiconductor structures
abstract A method for forming a semiconductor structure includes the following steps. Trenches are formed in a semiconductor region using a masking layer such that the trenches have a first depth, a first width along their bottom, and sidewalls having a first slope. The masking layer is removed, and a bevel etch is performed to taper the sidewalls of the trenches so that the sidewalls have a second slope less than the first slope.
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Total number of triples: 24.