| abstract |
A method of making electrical connections to an integrated circuit chip (1, 2, 3) comprises providing at least one chip having exposed conductors on its active surface, providing a substrate (4) having conductors (5) on its surface corresponding to said exposed conductors on the chip, mounting the chip on the substrate so that said conductors are in accurate alignment with the corresponding conductors on the substrate, bonding the chip to said substrate, and filling any voids between the conductors on the chip and the corresponding conductors on said substrate with a conductive material. This method removes the limitation imposed by the large pad size needed for conventional techniques. |