http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2022193085-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_7b1f811f86222712732c594b74f9fcc8 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-66477 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-336 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate | 2021-03-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_4421eac04388ac4a9c7c4fe4e8c30ed4 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_dac9f745a093e1a82e3f38ce7b95ae0b |
| publicationDate | 2022-09-22-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | WO-2022193085-A1 |
| titleOfInvention | Semiconductor structure and method for forming same |
| abstract | A semiconductor structure and a method for forming same. The structure comprises: a channel structure layer comprising a plurality of first channel layers sequentially arranged at intervals from bottom to top, the first channel layers extending along the transverse direction, and a direction parallel to a substrate and perpendicular to the transverse direction being the longitudinal direction; a gate structure spanning the channel structure layer and surrounding the first channel layers; a source-drain structure located on both sides of the gate structure, and comprising a first source-drain doped layer located on a side wall of the first channel layers; and a source-drain plug in contact with the top of the source-drain structure, and also in contact with at least one of side walls of the first source-drain doped layer, i.e., a side wall opposite to the gate structure along the longitudinal direction, a side wall of a first side along the transverse direction, and a side wall of a second side along the transverse direction. The source-drain plug is in contact with at least one of the side walls of the first source-drain doped layer, so that a current flows directly through the source-drain plug to each first channel layer, thereby reducing a voltage drop consumed by the current in a path flowing to each first channel layer, increasing a channel current value in each first channel layer, and enhancing a drive current of a device. |
| priorityDate | 2021-03-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 20.