| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_d80f1040809503e54509c871ba828f75
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c10320b05f723976a898536f012b60c2 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-8221
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823425
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0924
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78696
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-42392
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0688
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823821
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0886
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823814
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-822
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-786
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-739
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-66
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-423
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-06 |
| filingDate |
2020-06-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_180a59bcf05479b6533fb2a418a57a7d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_324c2b8f0a532bc2f0803f3eca00da7b |
| publicationDate |
2020-12-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
WO-2020263557-A1 |
| titleOfInvention |
Multiple nano layer transistor layers with different transistor architectures for improved circuit layout and performance |
| abstract |
A semiconductor device includes a plurality of nano-channel field-effect transistor stacks positioned adjacent to each other such that source-drain regions are shared between adjacent nano-channel field-effect transistor stacks, each nano-channel field-effect transistor stack including at least two nano-channel field-effect transistors and corresponding source/drain regions vertically separated from each other. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11552080-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2021351180-A1 |
| priorityDate |
2019-06-26-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |