| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_8cf8d77ac0eff1767b22d2fb9445b64d |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01J2237-332 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-32051
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-67017
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01J37-32642
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-67276
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01J37-32623
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02186
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01J37-32715
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-67253
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01J37-32449
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-68735
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-68721
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02175 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-687
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-67 |
| filingDate |
2019-04-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2769aa9f85db43ee2c5b350e590c6dcd
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b1760c09b41ee77c58810735379b0a91
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ed18c6833ce25bc75935654d9ac03829
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_45dc28561ad7d0178fe013b4fd9396e4
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0fd6d8e69db7dd77a687fcaecb8a1590 |
| publicationDate |
2020-01-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
WO-2019204754-A9 |
| titleOfInvention |
Edge exclusion control |
| abstract |
Provided herein are methods and apparatuses for controlling uniformity of processing at an edge region of a semiconductor wafer. In some embodiments, the methods include exposing an edge region to treatment gases such as etch gases and/or inhibition gases. Also provided herein are exclusion ring assemblies including multiple rings that may be implemented to provide control of the processing environment at the edge of the wafer. |
| priorityDate |
2018-04-20-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |