| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_c72d118f5664072de841f9c5c34b9d99 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-046
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823481 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-26513
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02529
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-8213
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0605
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-324
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0646
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-761
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-26506
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-1608 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-092
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-324
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-82
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-76
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2019-01-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ba08b8e8ae8dcd3ce62ad709870e7309
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_30acf58e38f46013f99f7264e966311c
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_901125bcc8da417ce854aac549c07c6a
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b9c072f01dfbf72a4f78ad45a6231853 |
| publicationDate |
2019-08-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
WO-2019156761-A1 |
| titleOfInvention |
High energy ion implantation for junction isolation in silicon carbide devices |
| abstract |
An integrated circuit includes a silicon carbide (SiC) epitaxial layer disposed on a SiC layer, wherein the SiC epitaxial layer has a first conductivity-type and the SiC layer has a second conductivity-type that is opposite to the first conductivity-type. The integrated circuit also includes a junction isolation feature disposed in the SiC epitaxial layer and having the second conductivity-type. The junction isolation feature extends vertically through a thickness of the SiC epitaxial layer and contacts the SiC layer, and wherein the junction isolation feature has a depth of at least about 2 micrometers (µm). |
| priorityDate |
2018-02-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |