| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_51d028c578ae85cb937b5b34a5129fbc |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-8221
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76897
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1211
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-845
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0688
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823475 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-285
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8234
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 |
| filingDate |
2018-01-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d354b852ff5ddfa4c0cb6e6fc1f50dad
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ff6aa4b3f6a29efc3ac8c01cea624e28
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_9474cc20d5698478d74f3cd06dd3acaf
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_74b86f4ffef9fddea9967d964a3a4813 |
| publicationDate |
2019-08-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
WO-2019152026-A1 |
| titleOfInvention |
Asymmetrical device terminals for 3d interconnection of a stacked device |
| abstract |
A terminal interconnect of a device is positioned asymmetrically relative to one or more semiconductor bodies of the device. A difference between a footprint of the terminal interconnect and footprint of a semiconductor body is predominantly to one side of the terminal. The terminal interconnect portion adjacent to a side of the device structure may extend to a greater depth without exceeding a threshold aspect ratio. In some examples, a terminal interconnect coupled to a gate, source, or drain terminal of a finFET in a vertically-stacked device is positioned asymmetrically to a semiconductor fin. A portion of the terminal interconnect adjacent to the fin may extend to a depth below a plane of the fin and intersect another interconnect, or another device terminal, that is in another plane of the stacked device. |
| priorityDate |
2018-01-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |