| abstract |
Provided are a field effect transistor structure and a preparation method therefor. The manufacturing comprises: providing a substrate, and depositing at least one first material layer and at least one second material layer on a surface of the substrate; defining an active region and a shallow trench isolation region; etching the active region to form a channel region, a source region and a drain region; corroding a first material layer or a second material layer in the channel region, so as to obtain at least one nanowire channel; depositing a dielectric layer and a gate structure layer on the surface of the nanowire channel; and manufacturing a gate electrode, a source electrode and a drain electrode on the surface of a gate structure layer, the source region and the drain region, so as to complete the manufacturing of the field effect transistor. By means of the solution, a three-dimensional stacked ring grating nanowire channel is formed by means of stacked Si or SiGe material layers, and in the same planar zone, the sectional area of the channel is increased, the performance of devices is enhanced, and a grid control ability and device stability are improved. A carrier transport capability is promoted and the device performance is improved, while reducing the device size, omitting source and drain doping steps, and having a simple processing procedure. |