Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f3518dca003902d9f332ad08ac9a6ffe |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02181 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-0217 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-4916 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02164 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-0847 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-517 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-167 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31111 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31053 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02271 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-28035 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-31144 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-02274 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-84 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-6659 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14689 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-76283 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-144 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-146 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14612 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-1207 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-088 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-144 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-762 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-146 |
filingDate |
2018-01-17-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_76fdc81cc474225930d26a7ff61c7e3d |
publicationDate |
2018-09-07-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
WO-2018159126-A1 |
titleOfInvention |
Semiconductor device, method for manufacturing semiconductor device, and electronic device |
abstract |
A semiconductor device according to an embodiment of the present invention comprises: an SOI substrate on which a silicon substrate layer, a first insulating layer, and a semiconductor layer are laminated in the stated order; a first transistor provided on the semiconductor layer; a second transistor having a higher withstand voltage than does the first transistor, the second transistor being provided on the silicon substrate layer; and an element isolation film provided between the first transistor and the second transistor, the element isolation film being configured from a second insulating layer that is buried in an opening that passes through the semiconductor layer and the first insulating layer and reaches the inside of the silicon substrate layer, and a portion of the second insulating layer constituting a gate insulation film of the second transistor. |
isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-111009540-A |
priorityDate |
2017-03-03-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |