| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_51d028c578ae85cb937b5b34a5129fbc |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C13-0007 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B63-80
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B63-30
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-026
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-841
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-826
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-24
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-245
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-028
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-063
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-8833
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N70-8416 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L45-00 |
| filingDate |
2016-07-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0697efbf0a3819321fb883a2ad158cf3
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d95e92ff59ffd4c81121755250ba4053
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_a6d8276ad382a26c2af851ec7cbec270
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d3ae700802cfc19488174d4a7eceb587
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d7a5c53cc886427c0f191656e3694f6b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d5b67e2da97fd009230a32fc81892613
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b4b37c55314f2162dd29203de7b4693e |
| publicationDate |
2018-01-11-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
WO-2018009156-A1 |
| titleOfInvention |
Rram devices and their methods of fabrication |
| abstract |
Embodiments of the present invention include RRAM devices and their methods of fabrication. In an embodiment, a resistive random access memory (RRAM) cell includes a conductive interconnect disposed in a dielectric layer above a substrate. An RRAM device is coupled to the conductive interconnect. An RRAM memory includes a bottom electrode disposed above the conductive interconnect and on a portion of the dielectric layer. A conductive layer is formed on the bottom electrode layer. The conductive layer is separate and distinct from the bottom electrode layer. The conductive layer further includes a material that is different from the bottom electrode layer. A switching layer is formed on the conductive layer. An oxygen exchange layer is formed on the switching layer and a top electrode is formed on the oxygen exchange layer. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-20200050339-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/KR-102358929-B1 |
| priorityDate |
2016-07-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |