| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_1e6ddf53a7a8db01a5314268a2c323b9 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0922 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03H3-0073
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/B06B1-0622
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10N39-00 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L41-047
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B06B1-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/B06B1-06
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03H3-007
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06K9-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-02
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-20 |
| filingDate |
2017-05-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_49e74a5d22f4904dbfbbc11ca9ac7c0b
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_2f5097dd14e6e511492b810841e57082
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8b6ef2ea9c15a2c286453c33994177d9
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ca4303695beb91e46e88079d11f5690d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_98cabce48ee95a047b3a5bf652cab0a3
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_badf7f39285b624e58111e9c92173f15 |
| publicationDate |
2017-11-09-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
WO-2017192899-A1 |
| titleOfInvention |
A two-dimensional array of cmos control elements |
| abstract |
An electronic device includes a plurality of CMOS control elements arranged in a two-dimensional array, where each CMOS control element of the plurality of CMOS control elements includes two semiconductor devices. The plurality of CMOS control elements include a first subset of CMOS control elements, each CMOS control element of the first subset of CMOS control elements including a semiconductor device of a first class and a semiconductor device of a second class, and a second subset of CMOS control elements, each CMOS control element of the second subset of CMOS control elements including a semiconductor device of the first class and a semiconductor device of a third class. The plurality of CMOS control elements are arranged in the two-dimensional array such that CMOS semiconductor devices of a class are only adjacent to other CMOS semiconductor devices of the same class. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11460957-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11682228-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11651611-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11471912-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11328165-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11440052-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11288891-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11673165-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11626099-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11392789-B2 |
| priorityDate |
2016-05-04-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |