http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2017108193-A1

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filingDate 2016-12-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
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publicationDate 2017-06-29-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber WO-2017108193-A1
titleOfInvention Efficient and dependable clock synchronization in hardware
abstract The invention comprises a fault-tolerant clock synchronization method with high precision, hardware implementations thereof and the corresponding digital circuits, designed to contain metastability.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11522551-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-2022158644-A1
priorityDate 2015-12-23-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

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Total number of triples: 22.