| abstract |
A manufacturing method according to one embodiment comprises sequentially forming a thin-film transistor (TFT) layer, a planarization layer (110), and a display element part on a substrate. In forming the TFT layer, an upper electrode (108) is covered, and a passivation layer (109) is formed so as to adjoin the planarization layer. In forming the display element part, a lower electrode is formed so as to adjoin the planarization layer. In connecting the upper electrode of the TFT layer and the lower electrode of the display element part, a contact hole (110a) is first opened in the planarization layer until the passivation layer is exposed at the bottom. Dry etching using a fluorine-containing gas is subsequently applied to the passivation layer exposed at the bottom of the contact hole, whereby a contact hole (109a) in which the upper electrode is exposed at the bottom is opened. A liquid-repellent film (121) that contains fluorine in the composition thereof is formed on the inner wall surface that faces the contact hole in the passivation layer. The lower electrode is then formed along the inner wall surface of the passivation layer and the planarization layer that faces the contact hole. |