| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_06692db7881d681828270358c02ac430
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_2574738835bfa894a674029102e63f27
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_ac5ed9c97100186e56186a2764f06e8c |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-0944
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-20
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03K19-0948
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L29-78642
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L21-823885
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-0207 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-10
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03K19-0944
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L29-78 |
| filingDate |
2014-04-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_77538957e0bcf43f7c9a0882c6ad8018
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_b440be1e014b79b0dafdca6611e91bd2 |
| publicationDate |
2015-10-15-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
WO-2015155863-A1 |
| titleOfInvention |
Semiconductor device |
| abstract |
Provided is a semiconductor device having a small area and constituting a decoder for memory selection, using a Surrounding Gate Transistor (SGT) being a vertical transistor. A semiconductor device constituting a decoder having a small area is provided as a result of, in a three-input NOR decoder comprising six MOS transistors arranged in a column: the MOS transistors constituting the decoder being formed upon a flat silicon layer formed upon a substrate; a drain, a gate, and a source being arranged vertically; the gate having a structure surrounding a silicon column; the flat silicon layer comprising a first activation area having a first conductivity type and a second activation area having a second conductivity type; and said areas being connected to each other via a silicon layer formed on the surface of the flat silicon layer. |
| priorityDate |
2014-04-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |