| abstract |
Provided is a method for preparing a quasi silicon on insulator (SOI) source/drain field effect transistor device, comprising the steps of: forming an active region of a device; forming a gate stacking layer structure of the device; forming the doping of a source/drain extension region, and forming first-layer side walls (9) at the two sides of the gate stacking layer; forming a concave source/drain structure; forming a quasi SOI source/drain isolation layer (14); performing in situ doping and epitaxy on a source/drain of a second semiconductor material (15), and conducing annealing activation; if a gate-last process is adopted, removing a previous dummy gate, and re-depositing a high-k metal gate; and forming a contact and metal interconnection (21). The method can be well compatible with an existing complementary metal oxide semiconductor (CMOS) process, and has the characteristics of simple process and small thermal budget. Compared with the traditional field effect transistor, the quasi SOI source/drain field effect transistor device prepared according to the method can effectively reduce current leakage, thereby reducing the power consumption of the device. |