http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2014112476-A1

Outgoing Links

Predicate Object
assignee http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_94cd1c625c2aaff4430c162427747a8d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0cdb88d7577707b85ff2721c34d1cc83
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f4ea5d8029e217c8ea3e28c5d592acd3
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_dc552b32fc20826a1da75b449162c420
classificationCPCAdditional http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2207-2227
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-50
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C2207-005
classificationCPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C5-148
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4076
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G11C11-4074
classificationIPCInventive http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-401
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-04
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-822
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C5-14
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-4074
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G11C11-413
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242
filingDate 2014-01-14-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_529de234ed2bf972bf63f0add503de67
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1f2ecb9d7928fabd29d75c2909fb2f1d
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_5b540eafbce53d2af72e901d59ef6251
publicationDate 2014-07-24-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber WO-2014112476-A1
titleOfInvention Semiconductor storage device
abstract The purpose of the present invention is to reduce stand-by current and achieve high-speed operations in a semiconductor storage device of an SCRC type. The semiconductor storage device includes a first voltage supply line that transmits a first voltage, and a second voltage supply line that transmits a second voltage. Further, the semiconductor storage device has an electric path between the first voltage supply line and the second voltage supply line, and includes a switch circuit that causes, with a first voltage level of a control gate, a part between the first voltage supply line and the second voltage supply line to assume a conductive state, and with a second voltage level of the control gate, causes the part between the first voltage supply line and the second voltage supply line to assume a non-conductive state. Further, the semiconductor storage device includes a compensation capacitor circuit that is connected to the second voltage supply line. Here, the compensation capacitor circuit and the switch circuit are adjacent to each other, and share a first diffusion layer of a first conductivity type.
priorityDate 2013-01-15-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

Incoming Links

Predicate Subject
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2000195254-A
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2011222919-A
isDiscussedBy http://rdf.ncbi.nlm.nih.gov/pubchem/substance/SID426135032
http://rdf.ncbi.nlm.nih.gov/pubchem/compound/CID7156993

Total number of triples: 32.