http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2014107504-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_e757fd4fedc4fe825bb81b1b466a0947 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L27-14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H01L33-52 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F30-39 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-00 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01S5-026 |
| filingDate | 2014-01-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_f42c7b99f5a89ac020df6d0456de0e5a http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_17e05b12e0930544104ae431ecb38166 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_74796764ec83260e9edcfae6ea2f1bc6 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_79035214b290d231a8af4f57dfc1311b |
| publicationDate | 2014-07-10-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | WO-2014107504-A1 |
| titleOfInvention | Silicon photonics photodetector integration |
| abstract | A method of forming an integrated photonic semiconductor structure having a photonic device and adjacent CMOS devices may include depositing a first silicon nitride layer over the adjacent CMOS devices and depositing an oxide layer over the first silicon nitride layer, wherein the oxide layer conformally covers the first silicon nitride layer and the underlying adjacent CMOS devices to form a substantially planarized surface over the adjacent CMOS devices. A second silicon nitride layer is then deposited over the oxide layer and a region corresponding to forming the photonic device. A germanium layer is deposited over the oxide layer and the region corresponding to forming the photonic device. The germanium layer deposited over the adjacent CMOS devices is etched to form a germanium active layer within the photonic region, whereby the oxide layer and the second silicon nitride layer protect the adjacent CMOS devices during the etching of the germanium. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10962659-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-10132934-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/DE-102015114738-A1 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-9874693-B2 http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2016200643-A1 |
| priorityDate | 2013-01-02-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 32.