| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_73f243529efe1a221dbfe67962fd40f2 |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M13-151
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M13-11
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M13-09 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F11-1012
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M13-15
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M13-2927
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M13-2909 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M13-05
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F12-00 |
| filingDate |
2013-10-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_c9560570a90ec81e394439d087190f64 |
| publicationDate |
2014-05-01-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
WO-2014066595-A2 |
| titleOfInvention |
Non-volatile memory error correction |
| abstract |
Improving the performance, life and amount of data storage in write limited non-volatile memory may be achieved by: a) utilizing a serial content-addressable memory (CAM) to perform logical address translation, b) a minimum CAM function to perform erase error count wear leveling, c) increasingly refining a two dimensional error-correction coding (ECC) method as needed to correct for degrading storage, and/or d) serially generating ECC and using an ECC serial decoder to correct the data. |
| priorityDate |
2012-10-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |