http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2013190401-A2

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inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8abae0ec8c65878fec1cac4988491eb8
publicationDate 2013-12-27-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber WO-2013190401-A2
titleOfInvention A digital x-ray sensor
abstract An X-ray digital sensor (100), wherein a semiconductor conversion layer (10) configured for receiving and convert photons (2) into an electric charge (14) is integrated with a semiconductor collection layer (20), which is preferably a CMOS ASIC, and is formed by pixels (22) arranged preferably in a hexagonal honeycomb pattern, the pixels configured for receiving electrons (16) from the conversion layer (10), and wherein each collection pixel (22) comprises N discriminators (24i) each configured for carrying out a comparison between the inlet charge (14) and an own threshold (25i), and for carrying out an instantaneous transition between 0 and 1 if the inlet charge (14) exceeds the threshold, while a counter (26i) associated to each discriminator (24i), leaves respectively unchanged or increases by 1 its own count if the collected charge is higher than the threshold in the respective discriminator (24i) and lower than the threshold (25i+1) of the immediately upper discriminator (24i+1), while the other counters are configured for keeping unchanged their own counts, so that the counters measure the photons (2) in N corresponding bands of energy defined by the neighbouring thresholds. A calibration means is provided that comprises a means for being simultaneously actuated for all the pixel (22) and comprises, in each pixel (22), a digital-to-analog converter (DAC, 28i) for each discriminator (24i), configured for receiving combinations of a predetermined number of bits and for generating electric currents corresponding to the combinations of bits; a supply means (206) for supplying a current to the amplification means (203) of each pixel (22); a logical means (34) resident in each pixel and configured for carrying out an iterative procedure (80) in order to identify an offset correction current, wherein combinations of bits are generated and transferred to the DAC (28i) that generates a corresponding trial current supplied to the amplification means (203) through the supply means (206), the logical means reads a counting of the counter (26i) and causes the procedure to be repeated, if the counting increases by the trial current, or store the latter as the correction current in a memory unit (35) of the pixel (22), if the counting does not increase by the trial current.
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