Predicate |
Object |
assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_bce787970b69aeb08d159e7c101c9ed7 |
classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-482 |
classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-01 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H10B12-488 |
classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L21-8242 http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H01L27-108 |
filingDate |
2013-05-24-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e84c2cf68162f7d5fcb06b0dca187f51 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_e7a6d07f48d7aa5b17f19759bd38f047 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_40958370a26d31525d73252177f6d5c8 |
publicationDate |
2013-12-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
publicationNumber |
WO-2013180757-A1 |
titleOfInvention |
Method of fabricating a gate-all-around word line for a vertical channel dram |
abstract |
A method of fabricating a self-aligned buried wordline in a structure which contains a self-aligned buried bit line, where the overall structure which makes up a portion of a vertical channel DRAM. The materials and processes used enable self-alignment of elements of the buried wordline during the fabrication process. In addition, the materials and processes used enable for formation of individual DRAM cells which have a buried bit line width which is 16 nm or less and a perpendicular buried wordline width which is 24 nm or less. |
priorityDate |
2012-05-31-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
type |
http://data.epo.org/linked-data/def/patent/Publication |