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filingDate 2012-11-09-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_0ef61f2c9c13ce2934c1124c0a597492
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publicationDate 2013-05-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber WO-2013071129-A1
titleOfInvention Apparatuses and operation methods associated with resistive memory cell arrays with separate select lines
abstract The present disclosure includes methods and apparatuses that include resistive memory. A number of embodiments include a first memory cell coupled to a data line and including a first resistive storage element and a first access device, a second memory cell coupled to the data line and including a second resistive storage element and a second access device, an isolation device formed between the first access device and the second access device, a first select line coupled to the first resistive storage element, and a second select line coupled to the second resistive storage element, wherein the second select line is separate from the first select line.
isCitedBy http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-7116785-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/JP-2020533798-A
priorityDate 2011-11-10-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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Total number of triples: 44.