http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2013036204-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_d07a9312aaf453993dfed84a4012e208 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_6b87a80da008513de46faf0779a34ba5 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_0962dc6121d63f3bda463e1078df3a25 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_36c0172f6059c0b200188dba42db7fa6 |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M1-14 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M1-46 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M1-1225 http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M1-34 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M1-12 |
| filingDate | 2012-09-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_780b21963d2f2bd37cb0d32b6838fae1 http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_1a37b39269c359aa1865ae9c743921ba http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_8234a09dbb6d0456edeb53f66a8c97f5 |
| publicationDate | 2013-03-14-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | WO-2013036204-A1 |
| titleOfInvention | An analog-to-digital converter for a multi-channel signal acquisition system |
| abstract | An analog-to-digital converter (ADC) for a multi-channel signal acquisition system, a signal acquisition system, a method of generating a digital output code from an analog input signal received at an input channel of a plurality of input channels, and a method of converting a plurality of analog input signals to a digital output signal are provided. The ADC comprises a sample-and-hold (S/H) circuit for each input channel, and operable to receive a respective analog input signal for each input channel; a digital-to-analog converter (DAC) common to all input channels; a comparator for each input channel, said comparator configured to receive an output signal from the S/H circuit of the respective input channel as a first input signal, and an output signal from the DAC as a second input signal, for generating a comparison result at each conversion cycle of the comparator; and a successive approximation register (SAR) common to all input channels and configured to generate, for each input channel, a digital output code based on the comparison results received from the respective comparator. |
| isCitedBy | http://rdf.ncbi.nlm.nih.gov/pubchem/patent/CN-109787631-A |
| priorityDate | 2011-09-06-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 23.