http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2012142592-A1

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filingDate 2012-04-16-04:00^^<http://www.w3.org/2001/XMLSchema#date>
inventor http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_237fe02e3cb601ae9a6c1c4da5d41fe9
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publicationDate 2012-10-18-04:00^^<http://www.w3.org/2001/XMLSchema#date>
publicationNumber WO-2012142592-A1
titleOfInvention Through package via structures in panel-based silicon substrates and methods of making the same
abstract The various embodiments of the present invention provide a low cost, low electrical loss, and low stress panel-based silicon interposer with TPVs. The interposer of the present invention has a thickness of about 100 microns to 200 microns and such thickness is achieved without utilizing a carrier and further wherein no grinding, bonding, or debonding methods are utilized, therefore distinguishing the interposer of the present invention from prior art embodiments.
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priorityDate 2011-04-14-04:00^^<http://www.w3.org/2001/XMLSchema#date>
type http://data.epo.org/linked-data/def/patent/Publication

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