| abstract |
Methods for fabricating integrated circuit electrical interconnects and electrical interconnects are provided. Methods include providing a substrate having a surface, the surface having a feature formed therein wherein the feature is a trench or via, depositing a metal layer, the metal of the metal layer being selected from the group consisting of Ru, Co, Pt, Ir, Pd, Re, and Rh, onto surfaces of the feature, depositing a copper seed layer wherein the copper seed layer comprises a dopant and the dopant is selected from the group consisting of Mn, Mg, MgB 2 . P, B, Al, Co and combinations thereof, onto the metal layer, and depositing copper into the feature. Devices comprising copper interconnects having metal liner layers are provided. Devices having liner layers comprising ruthenium are provided. |