| Predicate |
Object |
| assignee |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_82a9e22a923eca64a02a97f0dfb493ed
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_34520f95d184c71c89546196cb529b19
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_14f5bf10e125543a14481be5ad7ea804
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_7ba72f333321f665628cab012a3f38c3
http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_979e21471caa6e694be3e78ae4eca54d |
| classificationCPCAdditional |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R3-00
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2846
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2896 |
| classificationCPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F9-3869
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R31-2889
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G06F9-3851
http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/G01R1-07378 |
| classificationIPCInventive |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F9-38
http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/G06F9-50 |
| filingDate |
2010-12-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor |
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_ced23b561a5c40ea5d82ee3e3e1140e0
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_6de53796d3e47b5b1318353e95c8d7ba
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_615c3a52822c44c1ba3685459de5cfd7
http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_40578118eef6cfc3623b7a5b3cf6b5a2 |
| publicationDate |
2011-06-16-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber |
WO-2011072083-A1 |
| titleOfInvention |
Thread allocation and clock cycle adjustment in an interleaved multi-threaded processor |
| abstract |
Methods, apparatuses, and computer-readable storage media are disclosed for reducing power by reducing hardware-thread toggling in a multi-threaded processor. In a particular embodiment, a method allocates software threads to hardware threads. A number of software threads to be allocated is identified. It is determined when the number of software threads is less than a number of hardware threads. When the number of software threads is less than the number of hardware threads, at least two of the software threads are allocated to non-sequential hardware threads. A clock signal to be applied to the hardware threads is adjusted responsive to the non-sequential hardware threads allocated. |
| isCitedBy |
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/US-11256543-B2
http://rdf.ncbi.nlm.nih.gov/pubchem/patent/EP-3591518-A4 |
| priorityDate |
2009-12-08-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type |
http://data.epo.org/linked-data/def/patent/Publication |