http://rdf.ncbi.nlm.nih.gov/pubchem/patent/WO-2011053482-A1
Outgoing Links
| Predicate | Object |
|---|---|
| assignee | http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_f47985b7c371b565f319708450999686 http://rdf.ncbi.nlm.nih.gov/pubchem/patentassignee/MD5_9c8213b08f1710a7defe06dbd14cb29f |
| classificationCPCAdditional | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M1-765 |
| classificationCPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentcpc/H03M1-682 |
| classificationIPCInventive | http://rdf.ncbi.nlm.nih.gov/pubchem/patentipc/H03M1-66 |
| filingDate | 2010-10-19-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| inventor | http://rdf.ncbi.nlm.nih.gov/pubchem/patentinventor/MD5_d1655c20016f7b748c40e10b61712dac |
| publicationDate | 2011-05-05-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| publicationNumber | WO-2011053482-A1 |
| titleOfInvention | A digital-to-analogue converter |
| abstract | An N-bit DAC comprises a main DAC circuit having main nodes on which analogue voltages are produced of progressively increasing values in steps of the value of one MSB value, and a sub-DAC circuit having secondary nodes on which analogue voltages are produced of progressively increasing values in steps of the value of one LSB. A main switch network couples the secondary nodes to a selected pair of main nodes as the MSB value of the digital input signal varies. A secondary switch network selectively couples one of secondary nodes to an output terminal for providing an analogue voltage output signal. The main nodes are coupled between main terminals, and a voltage reference is applied across input terminals. A first offset circuit and a first compensating circuit are selectively coupleable between the main DAC circuit and the input terminals for offsetting the main node analogue voltages downwardly. |
| priorityDate | 2009-10-30-04:00^^<http://www.w3.org/2001/XMLSchema#date> |
| type | http://data.epo.org/linked-data/def/patent/Publication |
Incoming Links
Total number of triples: 28.